论文标题:基于DSP的数据加密卡与图像压缩平台系统设计与实现
Design of a High Sampling-Rate FIR Digital Filter Based on FPGA with VHDL
论文作者 尹军
论文导师 唐朝京；梁光明,论文学位 硕士,论文专业 信息与通信工程
论文单位 国防科学技术大学,点击次数 82,论文页数 95页File Size3975k
2002-01-01论文网 http://www.lw23.com/lunwen_354289267/ 信息安全;多媒体通信;数据加解密;图像压缩;数字信号处理;可编程专用集成电路;硬件描述语言
information security,multimedia communication,data encrypt and decrypt,image compress,DSP,ASIC,VHDL
信息安全技术和多媒体通信技术是当今信息科学研究领域的热点课题，而保密编码和压缩编码则是实现信息安全和多媒体通信的关键。本文结合“SQY-15医疗保险信息系统加密子系统”和“通用图像压缩平台”两项目，提出了基于数字信号处理器(DSP)和可编程专用集成电路(ASIC)实现数据加密卡和图像压缩平台的解决方案，重点介绍了基于DSP的数据加解密卡和图像压缩平台设计与实现中的三个关键技术：(1)DSP应用系统设计；(2)VHDL语言设计EPLD技术；(3)PCI接口技术。设计实现了数据加解密卡和图像压缩平台，为加解密算法和压缩算法的实现打下物质基础。 主要做了以下几方面工作： (1)分析了医疗保险信息系统加密子系统需要解决的主要问题，提出了采用DSP技术实现加解密算法的数据加密卡解决方案； (2)数据加解密卡的硬件设计和实现。采用DSP芯片、PCI接口芯片、异步FIFO等器件，通过EPLD控制实现了数据加解密卡； (3)基于DSP的通用图像压缩平台的设计与实现。采用DSP芯片、视频处理芯片和SDRAM等器件，设计实现了图像压缩平台； (4)基于通用图像压缩平台，编写了静态图像压缩JPEG算法。 同时，本文还简单介绍VHDL语言设计技术和关键芯片的使用技术。
Information security technology and multimedia communication technology are hotspots in the information science technology,and secrecy coding and compress coding are keys to realize information security and multimedia communication. In this article,two projects-"SQY-15 encrypt subsystem of hospitalization insurance system "and "general image compress flatform" are combined to get a resolvent scheme to realize data encrypt and image compress based on digital signal processor (DSP) and application specific integrated circuits (ASIC). This article includes three key technologies in designing and realizing the data encrypt card and the image compress flatform. They are:(1) design of DSP application system;(2) EPLD designing technology using VHDL language;(3) PCI interface technology . This design implements the data encrypt card and the image compress flatform and grounds for the cipher and compress arithmetic.The major work is as following:The main problem that the encrypt subsystem of hospitalization insurance system is Analyzed,and the scheme using DSP technology to realize encrypt arithmetic is brought out.The data encrypt card using DSP chip,PCI interface chip,asynchronism FIFO chip and EPLD that realize the control of the data encrypt card is designed and implemented.The image compress flatform using DSP chip,image processing chip and SDRAM is designed and implemented.The JPEG arithmetic based on general image compress flatform is realized.Also,VHDL language design technology and main chip apply technology are simply introduced.
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