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基于FPGA的USB接口数据采集系统研究

论文标题:基于FPGA的USB接口数据采集系统研究
The Research for Data Acquisition System Based on USB 2.0 and FPGA
论文作者
论文导师 刘云飞,论文学位 硕士,论文专业 木材科学与技术
论文单位 南京林业大学,点击次数 139,论文页数 56页File Size4349K
2007-06-01论文网 http://www.lw23.com/lunwen_403951532/
USB2.0;; Data Acquisition;; Slave FIFO;; Firmware
随着科学技术水平的不断提高,在科研和生产过程中为了更加真实的反映被测对象的性质,对测试系统的性能要求越来越高。传统的测试装置,由于传输速度低或安装不便等问题已不能满足科研和生产的实际需要。USB技术的出现很好的解决了上述问题。USB总线具有支持即插即用、易于扩展、传输速率高(USB2.0协议下为480Mbps)等优点,已逐渐得到广泛的应用。 本课题研究并设计了一套基于USB2.0的数据采集系统。论文首先详细介绍了USB总线协议,然后从系统的总体结构、硬件电路、软件程序以及系统性能检测等几个方面,详细阐述了系统的设计思想和实现方案。系统采用双12位A/D转换器,提供两条模拟信号通道,可以同时采集双路信号,最高的采样率为200KHz。USB接口芯片采用Cypress公司的CY7C68013。论文详细介绍了其在Slave FIFO接口模式下的电路设计和程序设计。系统应用FPGA芯片作系统的核心控制,控制系统的数据采集和与USB接口芯片的数据交换,并产生其中的逻辑控制信号和时序信号。同时应用FPGA芯片作系统的核心控制可提高了系统稳定性、减小设备的体积。系统的软件设计,主要包括FPGA芯片中的逻辑、时序控制程序、8051固件程序、客户应用程序及其驱动程序。客户端选择了微软的Visual Studio 6.0 C++作开发平台,虽然增加了复杂程度,但是软件执行效率及重用性均得到提高。 最后,应用基于USB2.0的数据采集系统测试标准信号及电木的导热系数,以验证测试系统的可靠信与准确性。
During the science and technologies development in today’s world, to make the measurement more precise in the research and production, there are higher and higher demands for the performance of measurement systems. Traditional measurement systems and devices have the fault of low transmission rate and are not easy for installation. And from current view, these systems and devices cannot fulfill the higher demands in the industrial world. USB technology can solve the problems above. USB bus has been widely used for the features of:“plug-in and play”, easy for extensions and high transmission rate (480Mbps in the protocol of USB 2.0). This paper describes a Data Acquisition System (DAQ) based on USB 2.0.After the introduction of the USB protocol, this paper describes the system architecture, hardware, software and system performance, from which, the design and solution is given. The system has dual analog channels with 2 channels 12-bits AD converters; the highest sample rate is 200 KHz. The interface chip is CY7C68013 of Cypress. As well, this paper introduces the circuit design and program design for the mode of Slave FIFO of this chip. The system takes a FPGA chip as core logic control module. FPGA controls the sample process and communications with the USB chipset. FPGA also generates the control signals and timing sequence signals. This design will improve the system stability, and makes the device smaller. This paper also gives an overview of software part in the system, includes logical design in FPGA, timing control, firmware of 8051, driver and the client application at PC. At client PC side, Microsoft Visual Studio C++ 6.0 is chosen as the platform for development. To verify the reliability and accuracy of DAQ system, experiments were executed against the standard signals and bakelite thermal conductivity. At last of this paper, the experiment result is given and analyzed.

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